document number: 91213 www.vishay.com s09-0006-rev. a, 19-jan-09 1 power mosfet irfp254n, sihfp254n vishay siliconix features ? advanced process technology ? dynamic dv/dt rating ? 175 c operating temperature ? fully avalanche rated ? fast switching ? ease of paralleling ? simple drive requirements ? lead (pb)-free available description fifth generation power mosfets from vishay utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that these power mosfets are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. the to-247 package is preferred for commercial-industrial applications where higher power levels preclude the use of to-220 devices. the to-247 is similar but superior to the earlier to-218 package because of its isolated mounting hole. notes a. repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. starting t j = 25 c, l = 3.1 mh, r g = 25 , i as = 14 a, v gs = 10 v. c. i sd 14 a, di/dt 460 a/s, v dd v ds , t j 175 c. d. 1.6 mm from case. product summary v ds (v) 250 r ds(on) ( )v gs = 10 v 0.125 q g (max.) (nc) 100 q gs (nc) 17 q gd (nc) 44 configuration single n -channel mosfet g d s to-247 g d s a v aila b le rohs* compliant ordering information package to-247 lead (pb)-free irfp254npbf SIHFP254N-E3 snpb irfp254n sihfp254n absolute maximum ratings t c = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds 250 v gate-source voltage v gs 20 continuous drain current v gs at 10 v t c = 25 c i d 23 a t c = 100 c 16 pulsed drain current a i dm 92 linear derating factor 1.5 w/c single pulse avalanche energy b e as 300 mj repetitive avalanche current a i ar 14 a repetitive avalanche energy a e ar 22 mj maximum power dissipation t c = 25 c p d 220 w peak diode recovery dv/dt c dv/dt 7.4 v/ns operating junction and storage temperature range t j , t stg - 55 to + 175 c soldering recommendations (p eak temperature) for 10 s 300 d mounting torque 6-32 or m3 screw 10 lbf in 1.1 n m * pb containing terminations are not rohs compliant, exemptions may apply
www.vishay.com document number: 91213 2 s09-0006-rev. a, 19-jan-09 irfp254n, sihfp254n vishay siliconix notes a. repetitive rating; pulse width limited by maximum junction temper ature (see fig. 11). b. pulse width 400 s; duty cycle 2 %. thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -40 c/w case-to-sink, flat, greased surface r thcs 0.24 - maximum junction-to-case (drain) r thjc -0.68 specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 250 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma - 0.33 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.0 v gate-source leakage i gss v gs = 20 v - - 100 na zero gate voltage drain current i dss v ds = 250 v, v gs = 0 v - - 25 a v ds = 200 v, v gs = 0 v, t j = 150 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 14 a b - - 0.125 forward transconductance g fs v ds = 25 v, i d = 14 a 15 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz, see fig. 5 - 2040 - pf output capacitance c oss - 260 - reverse transfer capacitance c rss -62- total gate charge q g v gs = 10 v i d = 14 a, v ds = 200 v, see fig. 6 and 13 b - - 100 nc gate-source charge q gs --17 gate-drain charge q gd -- 44 turn-on delay time t d(on) v dd = 125 v, i d = 14 a, r g = 3.6 , see fig. 10 b -14- ns rise time t r -34- turn-off delay time t d(off) -37- fall time t f -29- internal drain inductance l d between lead, 6 mm (0.25") from package and center of die contact -5.0- nh internal source inductance l s -13- drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode --23 a pulsed diode forward current a i sm --92 body diode voltage v sd t j = 25 c, i s = 14 a, v gs = 0 v b --1.3v body diode reverse recovery time t rr t j = 25 c, i f = 14 a, di/dt = 100 a/ s - 210 310 ns body diode reverse recovery charge q rr -1.72.6nc forward turn-on time t on intrinsic turn-on time is neglig ible (turn-on is dominated by l s and l d ) d s g s d g
document number: 91213 www.vishay.com s09-0006-rev. a, 19-jan-09 3 irfp254n, sihfp254n vishay siliconix typical characteristics 25 c, unless otherwise noted fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature v ds , drain-to-so u rce v oltage ( v ) i d , drain-to-so u rce c u rrent (a) 0.1 1 10 100 0.1 1 10 100 v gs 15 v 10 v 8 .0 v 7.0 v 6.0 v 5.5 v 5.0 v 4.5 v to p bottom 4.5 v 20 s pulse w idth t j = 25 c i d , drain-to-so u rce c u rrent (a) 0.1 1 10 100 v ds , drain-to-so u rce v oltage ( v ) 1 10 100 v gs 15 v 10 v 8 .0 v 7.0 v 6.0 v 5.5 v 5.0 v 4.5 v to p bottom 4.5 v 20 s pulse w idth t j = 175 c t j = 25 c t j = 175 c 5.0 4.0 7.0 6.0 8 .0 9.0 1 10 100 v gs , gate-to-so u rce v oltage ( v ) i d , drain-to-so u rce c u rrent (a) v ds = 50 v 20 s pulse w idth i d = 23 a v gs = 10 v t j , j u nction temperat u re ( c) r ds(on) , drain-to-so u rce on resistance ( n ormalized) 20 40 60 8 0 100 120 140 160 0.0 1.0 2.0 3.0 -60 -40 -20 0 4.0
www.vishay.com document number: 91213 4 s09-0006-rev. a, 19-jan-09 irfp254n, sihfp254n vishay siliconix fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area c rss c oss c iss 1 10 100 1000 0 1000 2000 3000 4000 c, capacitance (pf) v ds , drain-to-so u rce v oltage ( v ) v gs = 0 v , f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 020 40 60 8 0 100 0 4 8 12 16 20 q g , total gate charge (nc) v gs , gate-to-so u rce v oltage ( v ) i d = 14 a v ds = 200 v v ds = 125 v v ds = 50 v for test circ u it see fig. 13 v sd , so u rce-to-drain v oltage ( v ) i sd , re v erse drain c u rrent (a) t j = 175 c t j = 25 c v gs = 0 v 100 0.4 0. 8 0.6 1.0 1.2 0.1 1 10 0.2 10 100 1000 10000 0.1 10 1000 1 i d , drain c u rrent (a) v ds , drain-to-so u rce v oltage ( v ) operati n g i n this area limited by r ds(on) 10 ms 1 ms 100 s t c = 25 c t j = 175 c single p u lse 100 1
document number: 91213 www.vishay.com s09-0006-rev. a, 19-jan-09 5 irfp254n, sihfp254n vishay siliconix fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case t c , case temperat u re (c) i d , drain c u rrent (a) 25 50 75 100 125 150 0 5 10 15 20 25 175 pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. v gs + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 t 1 , rectang u lar p u lse d u ration (s) thermal response (z thjc ) 0.01 0.02 0.05 0.10 0.20 d = 0.50 (thermal respo n se) t 1 t 2 n otes: 1. d u ty factor d = t 1 / t 2 2. peak t j = p dm x z thjc + t c p dm
www.vishay.com document number: 91213 6 s09-0006-rev. a, 19-jan-09 irfp254n, sihfp254n vishay siliconix fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test a r g i as 0.01 t p d.u.t. l v ds + - v dd dri v er a 15 v v gs i as v ds t p 25 400 300 200 100 0 150 125 100 75 50 i d top 5.6 a 9. 8 a bottom 14 a starting t j , j u nction temperat u re (c) e as , single p u lse a v alanche energy (mj) 500 600 175 q gs q gd q g v g charge v gs d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v c u rrent reg u lator c u rrent sampling resistors same type as d.u.t. + -
document number: 91213 www.vishay.com s09-0006-rev. a, 19-jan-09 7 irfp254n, sihfp254n vishay siliconix fig. 14 - for n-channel vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91213 . p. w . period di/dt diode reco v ery d v /dt ripple 5 % body diode for w ard drop re-applied v oltage re v erse reco v ery c u rrent body diode for w ard c u rrent v gs = 10 v * v dd i sd dri v er gate dri v e d.u.t. i sd w a v eform d.u.t. v ds w a v eform ind u ctor c u rrent d = p. w . period + - + + + - - - * v gs = 5 v for logic le v el de v ices and 3 v dri v e de v ices peak diode recovery dv/dt test circuit r g v dd ? d v /dt controlled b y r g ? dri v er same type as d.u.t. ? i sd controlled b y d u ty factor "d" ? d.u.t. - de v ice u nder test d.u.t. circ u it layo u t considerations ? lo w stray ind u ctance ? gro u nd plane ? lo w leakage ind u ctance c u rrent transformer
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.
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